
HDLSim
Verilog, CPLD & 3D breadboard
About
What's New in HDLSim
2.0.0
November 4, 2026
• Boolean equation compiler: type an equation and get its truth table, Karnaugh map, minimum form and gate circuit, ready to build on the breadboard with 74HC, 74HCT or 74LS chips. • Loose logic gates on the 2D schematic, with the chip that builds them. • Guided lessons to get started: your first circuit, your first Verilog gate, digital logic, and De Morgan with Karnaugh maps. • 29 guided labs and new components, such as the PC817 optocoupler and a DC motor. • The Free plan now limits components instead of labs or breadboards: designs with up to 7 components on the board the circuit needs. • Save when you want, with a warning for unsaved changes, and each account has its own project library.
MoreSubscriptions & In-App Purchases
HDLSim Pro Monthly
Every lab and the larger breadboards





